How to use the uart baud rate error calculator
- Enter the clock frequency that feeds the UART, in megahertz.
- Enter the baud rate you want and choose the samples per bit: 16 for normal mode, 8 for double speed.
- Tick the box if your register holds the divisor minus 1, as on AVR chips; leave it clear if it holds the divisor itself.
- Read the register value, the actual baud rate, the error and the table of standard rates for your clock.
Formula
Actual baud = f_clock / (S x divisor), with S the samples per bit (16, 8 or 4)
Ideal divisor = f_clock / (S x wanted baud), rounded to the nearest whole number
AVR style register: UBRR = round(f_clock / (S x baud)) - 1, and the divisor is UBRR + 1
Error % = (actual baud - wanted baud) / wanted baud x 100
Rounding the divisor to a whole number is the only source of error here, so a clock that is a multiple of 1.8432 MHz gives exact standard rates.
A 16 MHz microcontroller
At 16 MHz with 16 samples per bit, 9600 baud needs a divisor of 104.17, rounded to 104, so the register holds 103 and the actual rate is 9615.385 baud, an error of +0.16%. For 115200 baud the register is 8, the actual rate is 111,111.1 baud, and the error is -3.55%, too large for reliable use. With 8 samples per bit (double speed), the register is 16, the actual rate is 117,647.1 baud, and the error is +2.12%.
At 8 MHz, 9600 baud gives a register value of 51 and +0.16%. A 1.8432 MHz clock gives register 0 and an exact 115,200 baud, and at 16 MHz 250,000 baud is exact with register 3. These values match the tables in the data sheet of the ATmega328P.
Why the error matters
A UART has no shared clock. The receiver finds the start of each byte from the falling edge, then samples each bit at the middle of its time slot, relying on its own clock to keep time. If the two sides disagree on the bit time, the sample point drifts across the frame. By the last bit of a ten-bit frame the drift is ten times the per-bit error, and it must stay under half a bit, which sets a limit of about 5% total, or roughly 2% on each side to leave margin.
If you can, pick a clock that divides well: crystals at 1.8432, 3.6864, 7.3728 and 11.0592 MHz give exact standard rates. For other settings, the table shows the error for every common rate at your clock so you can choose a rate that works. For the number of bits a converter produces, see the ADC resolution calculator.
Chip differences
Chips differ in how the divisor is stored. Many AVR parts hold the divisor minus 1 in a 12-bit register and can switch to double speed. Other families use a fractional divider with extra bits, or a prescaler followed by a counter, so always check the formula in your data sheet. This page uses the common whole-number divisor scheme and tells you which register value to expect.
Related timing tools include the 555 timer calculator for oscillator frequency and the RC filter time constant calculator. Hexadecimal register values can be checked with the binary calculator.
Assumptions and limits
- The clock is accurate; a real crystal or oscillator adds its own error, which also counts against the budget.
- The divisor is a whole number. Fractional dividers give smaller errors and are not modeled.
- The guideline of about 2% per end is a rule of thumb for 8N1 frames.
- Samples per bit can be 16, 8 or 4; some chips offer other settings.
Frequently asked questions
What is baud rate error?
The difference between the baud rate you want and the one the divider produces, as a percentage of the wanted rate.
How much error is acceptable?
Keep it under about 2% at each end for a standard frame. The two errors add if they go in opposite directions.
What is UBRR?
The USART baud rate register on AVR chips. It holds the divisor minus 1.
Why is 115200 baud poor at 16 MHz?
Because 16 MHz divided by 16 x 115200 is 8.68, which rounds to 9 and gives an error of about 3.5%. Double speed mode or a different crystal fixes it.